Frontiers in Educational Research, 2025, 8(7); doi: 10.25236/FER.2025.080716.
Benqing Guo1,Yuanyuan Shi1, Yao Wang2, Huifen Wang3, Haishi Wang1, Tianbao Wang1
1Microelectronics School, Chengdu University of Information Technology, Chengdu, China
2School of Electrical and Information Engineering, Zhengzhou University, Zhengzhou, China
3School of Civil Engineering and Architecture, Henan University of Technology, Zhengzhou, China
This paper presents the integration of theory and practice in the course "CMOS Radio Frequency Integrated Circuits," underscoring the importance of both theoretical knowledge and practical software applications. The simulation practice of RF circuits is highlighted as a fusion with students' theoretical understanding. The teaching methodology utilizing Cadence Virtuoso software aims to maximize students’ engagement and enthusiasm for learning and troubleshooting. Taking a receiver frontend as an example, the study models the systematic circuit design and simulation process, enabling students to acquire a comprehensive understanding of RF receiver design. This approach not only lays a solid foundation for future studies but also seeks to improve students' capability by linking theory to practice. Ultimately, the quality of education in " CMOS RF Integrated Circuits," targeting postgraduate students, is promoted progressively and effectively.
CMOS RF Integrated Circuit, Practical Teaching, Receiver Frontend, Simulation
Benqing Guo, Yuanyuan Shi, Yao Wang, Huifen Wang, Haishi Wang, Tianbao Wang. Bridging Theory and Practice in CMOS Receiver Frontend Design: A Comprehensive Approach for Postgraduate Education. Frontiers in Educational Research (2025), Vol. 8, Issue 7: 112-119. https://doi.org/10.25236/FER.2025.080716.
[1] Fan J, Pang Z. Talent Cultivation Program for Integrated Circuits and Integrated Systems Under the Background of "New Engineering"[J]. Modern Education, 2020, 52: 24-28.
[2] Wan J. Application of AT-RF3020 RF Training System in RF Experiment Teaching[J]. Foreign Electronic Measurement Technology, 2008, 27(12): 58-61.
[3] Chen C, Wang T, Chen G, et al. Teaching Reform of RF Integrated Circuit Design Course Based on Engineering Education Accreditation[J]. Educational Teaching Forum, 2020, 42: 165-166.
[4] Liu H, Guo B, Han Y, Wu J. An Integrated LNA-Phase Shifter in 65 nm CMOS for Ka-Band Phased-Array Receivers[J]. International Journal of Circuit Theory and Applications, 2024, 52(5): 2126-2145.
[5] Guo B, Chen H, Wang X, Chen J, Xie X, Li Y. A 60 GHz Balun Low-Noise Amplifier in 28-nm CMOS for Millimeter-Wave Communication[J]. Modern Physics Letters B, 2019, 33(32): 1950396.
[6] Wang H, Guo B, Wang Y, Fan R, Sun L. A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA[J]. IEEE Access, 2023, 11: 26320-26328.
[7] Guo B, Wang X, Chen H. A 28 GHz Front-End for Phased Array Receivers in 180 nm CMOS Process[J]. Modern Physics Letters B, 2020, 34(supp01): 2150017.
[8] Guo B, Gong J, Wang Y, Wu J. A 0.2-3.3 GHz 2.4 dB NF 45 dB Gain CMOS Current-Mode Receiver Front-End[J]. Modern Physics Letters B, 2020, 34(22): 2050226.
[9] Razavi B. RF Microelectronics[M]. Second edition, Prentice Hall, 2012.
[10] Guo B, Gong J, Wang Y. A Wideband Differential Linear Low Noise Transconductance Amplifier With Active-Combiner Feedback in Complementary MGTR Configurations[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68(1): 224-237.
[11] Guo B, Chen J, Chen H, Wang X. A 0.1-1.4 GHz Inductorless Low-Noise Amplifier With 13 dBm IIP3 and 24 dBm IIP2 in 180 nm CMOS[J]. Modern Physics Letters B, 2018, 32: 1850009.
[12] Guo B, Li X. A 1.6-9.7 GHz CMOS LNA Linearized by Post Distortion Technique[J]. IEEE Microwave and Wireless Components Letters, 2013, 23(11): 608-610.
[13] Guo B, Wang H, Yang G. A Wideband Merged CMOS Active Mixer Exploiting Noise Cancellation and Linearity Enhancement[J]. IEEE Transactions on Microwave Theory and Techniques, 2014, 62(9): 2084-2091.
[14] Guo B, et al. Low-Frequency Noise in CMOS Switched-gm Mixers: A Quasi-Analytical Model[J]. IEEE Access, 2020, 8: 191219-191230.
[15] Guo B, Chen J, Wang X, Chen H. An Inductorless Active Mixer Using Stacked nMOS/pMOS Configuration and LO Shaping Technique[J]. Modern Physics Letters B, 2018, 32(11): 1850129.
[16] Guo B, Ma J, Liu L. Detailed Investigation of Active CMOS Mixers Noise in Submicron Technology[J]. Microelectronics Journal, 2011, 42(1): 196-203.
[17] Pini G, Manstretta D, Castello R. Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA[J]. IEEE Journal of Solid-State Circuits, 2020, 55(7): 1819-1829.
[18] Kargaran E, Guo B, Manstretta D, Castello R. A Sub-1-V, 350-μW, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS[J]. IEEE Solid-State Circuits Letters, 2019, 2(4): 29-32.
[19] Guo B, Chen H, Wang X, Li L, Zhou W. A Wideband Receiver Front-End With Low Noise and High Linearity by Exploiting Reconfigurable Dual Paths in 180 nm CMOS[J]. Modern Physics Letters B, 2021, 35(12): 2150210.
[20] Fabiano I, Sosio M, Liscidini A, Castello R. SAW-Less Analog Front-End Receivers for TDD and FDD[J]. IEEE Journal of Solid-State Circuits, 2013, 48(12): 3067-3079.
[21] Thijssen B J, Klumperink E A M, Quinlan P, Nauta B. 2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter[J]. IEEE Journal of Solid-State Circuits, 2021, 56(7): 2007-2017.
[22] Guo B, Wang H, Wang Y, Li K, Li L, Zhou W. A Mixer-First Receiver Frontend With Resistive-Feedback Baseband Achieving 200 MHz IF Bandwidth in 65 nm CMOS[C]. 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2022: 31-34.
[23] Guo B, Wang H, Li L, Zhou W. A 65 nm CMOS Current-Mode Receiver Frontend With Frequency-Translational Noise Cancelation and 425 MHz IF Bandwidth[C]. 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023: 21-24.
[24] Andrews C, Molnar A C. A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface[J]. IEEE Journal of Solid-State Circuits, 2010, 45(12): 2696-2708.
[25] Guo B, Wang H, Wang H, Li L, Zhou W, Jalali K. A 1-5 GHz 22 mW Receiver Frontend With Active-Feedback Baseband and Voltage-Commutating Mixers in 65 nm CMOS[J]. IET Circuits Devices & Systems, 2022, 16(7): 543-552.
[26] Blaakmeer S C, Klumperink E A M, Leenaerts D M W, Nauta B. Wideband Balun-LNA With Simultaneous Output Balancing Noise-Canceling and Distortion-Canceling[J]. IEEE Journal of Solid-State Circuits, 2008, 43(6): 1341-1350.
[27] Guo B, Chen J, Li L, Jin H, Yang G. A Wideband Noise-Canceling CMOS LNA With Enhanced Linearity by Using Complementary nMOS and pMOS Configurations[J]. IEEE Journal of Solid-State Circuits, 2017, 52(5): 1331-1344.
[28] Guo B, Chen J. A mm-Wave Two-Stage CMOS LNA Using Noise Cancelling and Post-Distortion Techniques[C]. 2024 19th European Microwave Integrated Circuits Conference (EuMIC), 2024: 407-410.
[29] Im D, Nam I, Kim H T, Lee K. A Wideband CMOS Low Noise Amplifier Employing Noise and IM2 Distortion Cancellation for a Digital TV Tuner[J]. IEEE Journal of Solid-State Circuits, 2009, 44(3): 686-698.
[30] Guo B, Yang G, An S. A Wideband Noise-Canceling CMOS LNA Using Cross-Coupled Feedback and Bulk Effect[J]. Frequenz, 2014, 68(5-6): 243-249.
[31] Razavi B. Design of Analog CMOS Integrated Circuits[M]. 1st edition, McGraw-Hill Education, 2000.
[32] Bhat A N, van der Zee R, Finocchiaro S, Dantoni F, Nauta B. A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth With a 3-Stage Inverter-Only OpAmp[C]. 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019: 155-158.
[33] Fan R, Guo B, Wang H, Wang H, Chen J. A Broadband Single-Ended Active-Feedforward-Noise-Canceling LNA With IP2 Enhancement in Stacked n/pMOS Configurations[J]. Microelectronics Journal, 2024, 149: 106257.
[34] Zhang H, Sánchez-Sinencio E. Linearization Techniques for CMOS Low Noise Amplifiers: A Tutorial[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2011, 58(1): 22-36.
[35] Fan R, Guo B, Chen J. A 1-11 GHz Balun CMOS LNA Achieving 1.9-dB NF Gain-Error< 0.15 dB and Phase-Error< 0.9°[C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 382-386.
[36] Wu J, Guo B, Wang H, Liu H, Li L, Zhou W. A 2.4 GHz 87μW Low-Noise Amplifier in 65 nm CMOS for IoT Applications[J]. Modern Physics Letters B, 2021, 35(32): 2150485.
[37] Liao X, Guo B, Wang H. A 14.5 GHz Dual-Core Noise-Circulating CMOS VCO With Tripler Transformer Coupling, Achieving -123.6 dBc/Hz Phase Noise at 1MHz Offset[C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 377-381.
[38] Yang C, Guo B, Wang H, Wang Y, Chen J. A 30-39 GHz 3.1-3.4 NF 6.6 dBm IIP3 CMOS Low-Noise Amplifier With Post-Linearization Technique[C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 372-376.
[39] Guo B, Chen J, Wang Y, Jin H, Yang G. A Wideband Complementary Noise Cancelling CMOS LNA[C]. 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2016: 142-145.
[40] Guo B, Gong J. A Dual-Band Low-Noise CMOS Switched-Transconductance Mixer With Current-Source Switch Driven by Sinusoidal LO Signals[C]. 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2021: 741-744.