Frontiers in Educational Research, 2025, 8(12); doi: 10.25236/FER.2025.081214.
Benqing Guo1, Jing Gong2, Jianghu Cai1
1Microelectronics School, Chengdu University of Information Technology, Chengdu, China
2West China Hospital, Sichuan University, Chengdu, China
To address the persistent disconnect between theoretical microelectronics education and practical industrial design, this article introduces an innovative Research-Oriented Teaching (ROT) methodology. The core of this reform involves transforming a high-performance 1–11 GHz CMOS LNA design into a structured graduate-level teaching module. Unlike traditional approaches that focus on idealized models, this curriculum uses the "Broadband Balun LNA" case study to immerse students in solving real-world challenges such as parasitic-induced imbalance and power efficiency trade-offs. The pedagogical framework guides students through a complete "conception-to-verification" cycle, emphasizing the role of dual-tier CCCG structures in active error correction. Quantitative assessment of a 35-student pilot group shows a 30.8% improvement in specification compliance and a significant surge in their ability to perform robust PVT and Monte Carlo analyses. This case study demonstrates how integrating specialized research into the classroom can effectively prepare students for the complexities of advanced 5G and sensing system designs.
RFIC Education, Practical Teaching Reform, Research-Oriented Teaching, Master Degree
Benqing Guo, Jing Gong, Jianghu Cai. Research-Oriented Teaching (ROT) in Graduate RFIC Design: A Case Study of Balun LNA with Decade Bandwidth. Frontiers in Educational Research (2025), Vol. 8, Issue 12: 95-102. https://doi.org/10.25236/FER.2025.081214.
[1] Guo B, Chen J, Wang Y. A 0.2-3.3 GHz 2.4 dB NF 45 dB Gain Current-Mode Front-End for SAW-less Receivers in 180 nm CMOS[C]. 2019 8th International Symposium on Next Generation Electronics (ISNE), 2019: 1-3.
[2] Guo B, Chen J. A mm-Wave Two-Stage CMOS LNA Using Noise Cancelling and Post-Distortion Techniques[C]. 2024 19th European Microwave Integrated Circuits Conference (EuMIC), 2024: 407-410.
[3] Kargaran E, Guo B, Manstretta D, Castello R. A Sub-1-V, 350-μW, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS[J]. IEEE Solid-State Circuits Letters, 2019, 2(4): 29-32.
[4] Thijssen B J, Klumperink E A M, Quinlan P, Nauta B. 2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter[J]. IEEE Journal of Solid-State Circuits, 2021, 56(7): 2007-2017.
[5] Guo B. A 0.2–6 GHz 65 nm CMOS Active-Feedback LNA With Threefold Balun-Error Correction and Implicit Post-Distortion Technique[C]. 2025 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Francisco, CA, USA, 2025: 451–454.
[6] Guo B, Shi Y, Wang Y, Wang H, Wang H, Wang T. Bridging Theory and Practice in CMOS Receiver Frontend Design: A Comprehensive Approach for Postgraduate Education[J]. Frontiers in Educational Research, 2025, 8(7): 112-119.
[7] Guo B, Shi Y, Wang Y, Wang H, Wang H, Wang T. Enhancing Student Engagement in RF Integrated Circuit Course through Simulation Practices Using Cadence and EMX[J]. Frontiers in Educational Research, 2025, 8(5): 177-183.
[8] Guo B, Gong J. AI-Enabled Teaching Reform of a Millimeter-Wave Amplifier Design Course: Accelerating Passive Synthesis with RFIC-GPT for a 30 GHz Noise-Cancelling LNA Case Study[J]. Frontiers in Educational Research (2025), Vol. 8, Issue 10: 44-52.
[9] Razavi B. RF Microelectronics[M]. Second edition, Prentice Hall, 2012.
[10] Blaakmeer S C, Klumperink E A M, Leenaerts D M W, Nauta B. Wideband Balun-LNA With Simultaneous Output Balancing Noise-Canceling and Distortion-Canceling[J]. IEEE Journal of Solid-State Circuits, 2008, 43(6): 1341-1350.
[11] Guo B, Chen J, Li L, Jin H, Yang G. A Wideband Noise-Canceling CMOS LNA With Enhanced Linearity by Using Complementary nMOS and pMOS Configurations[J]. IEEE Journal of Solid-State Circuits, 2017, 52(5): 1331-1344.
[12] Im D, Nam I, Kim H T, Lee K. A Wideband CMOS Low Noise Amplifier Employing Noise and IM2 Distortion Cancellation for a Digital TV Tuner[J]. IEEE Journal of Solid-State Circuits, 2009, 44(3): 686-698.
[13] Guo B, Yang G, An S. A Wideband Noise-Canceling CMOS LNA Using Cross-Coupled Feedback and Bulk Effect[J]. Frequenz, 2014, 68(5-6): 243-249.
[14] Fan R, Guo B. A 1-11 GHz Balun CMOS LNA Achieving 1.9-dB NF Gain-Error< 0.15 dB and Phase-Error< 0.9° [C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 382-386.
[15] Guo B, Liao X, Wang Y. A 22 mW CMOS Receiver Frontend Using Active-Feedback Baseband and Passive-Voltage Mixers Embedded in Current Mirrors[C]. 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2022: 324-328.
[16] Wang H, Guo B, Wang Y, Fan R, Sun L. A Baseband-Noise-Cancelling Mixer-First CMOS Receiver Frontend Attaining 220 MHz IF Bandwidth With Positive-Capacitive-Feedback TIA[J]. IEEE Access, 2023, 11: 26320-26328.
[17] Guo B, Wang H, Li L, Zhou W. A 65 nm CMOS Current-Mode Receiver Frontend With Frequency-Translational Noise Cancelation and 425 MHz IF Bandwidth[C]. 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023: 21-24.
[18] Pini G, Manstretta D, Castello R. Analysis and Design of a 260-MHz RF Bandwidth +22-dBm OOB-IIP3 Mixer-First Receiver With Third-Order Current-Mode Filtering TIA[J]. IEEE Journal of Solid-State Circuits, 2020, 55(7): 1819-1829.
[19] Guo B, Chen H, Wang X, Li L, Zhou W. A Wideband Receiver Front-End With Low Noise and High Linearity by Exploiting Reconfigurable Dual Paths in 180 nm CMOS[J]. Modern Physics Letters B, 2021, 35(12): 2150210.
[20] Fabiano I, Sosio M, Liscidini A, Castello R. SAW-Less Analog Front-End Receivers for TDD and FDD[J]. IEEE Journal of Solid-State Circuits, 2013, 48(12): 3067-3079.
[21] Guo B, Wang H, Wang Y, Li K, Li L, Zhou W. A Mixer-First Receiver Frontend With Resistive-Feedback Baseband Achieving 200 MHz IF Bandwidth in 65 nm CMOS[C]. 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2022: 31-34.
[22] Guo B, Gong J, Wang Y, Wu J. A 0.2-3.3 GHz 2.4 dB NF 45 dB Gain CMOS Current-Mode Receiver Front-End[J]. Modern Physics Letters B, 2020, 34(22): 2050226.
[23] Liu H, Guo B, Han Y, Wu J. An Integrated LNA-Phase Shifter in 65 nm CMOS for Ka-Band Phased-Array Receivers[J]. International Journal of Circuit Theory and Applications, 2024, 52(5): 2126-2145.
[24] Guo B, Wang X, Chen H. A 28 GHz Front-End for Phased Array Receivers in 180 nm CMOS Process[J]. Modern Physics Letters B, 2020, 34(supp01): 2150017.
[25] Guo B, Chen H, Wang X, Chen J, Xie X, Li Y. A 60 GHz Balun Low-Noise Amplifier in 28-nm CMOS for Millimeter-Wave Communication[J]. Modern Physics Letters B, 2019, 33(32): 1950396.
[26] Guo B, Gong J, Wang Y. A Wideband Differential Linear Low Noise Transconductance Amplifier With Active-Combiner Feedback in Complementary MGTR Configurations[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2021, 68(1): 224-237.
[27] Guo B, Li X. A 1.6-9.7 GHz CMOS LNA Linearized by Post Distortion Technique[J]. IEEE Microwave and Wireless Components Letters, 2013, 23(11): 608-610.
[28] Guo B, Wang H, Yang G. A Wideband Merged CMOS Active Mixer Exploiting Noise Cancellation and Linearity Enhancement[J]. IEEE Transactions on Microwave Theory and Techniques, 2014, 62(9): 2084-2091.
[29] Guo B, Chen J, Chen H, Wang X. A 0.1-1.4 GHz Inductorless Low-Noise Amplifier With 13 dBm IIP3 and 24 dBm IIP2 in 180 nm CMOS[J]. Modern Physics Letters B, 2018, 32(02): 1850009.
[30] Guo B, et al. Low-Frequency Noise in CMOS Switched-gm Mixers: A Quasi-Analytical Model[J]. IEEE Access, 2020, 8: 191219-191230.
[31] Guo B, Chen J, Wang X, Chen H. An Inductorless Active Mixer Using Stacked nMOS/pMOS Configuration and LO Shaping Technique[J]. Modern Physics Letters B, 2018, 32(11): 1850129.
[32] Mirhoseini A, Goldie A, Yazgan M, et al. A graph placement methodology for fast chip design[J]. Nature, 2021, 594(7862): 207–212.
[33] Fan R, Guo B, Wang H, Wang H, Chen J. A Broadband Single-Ended Active-Feedforward-Noise-Canceling LNA With IP2 Enhancement in Stacked n/pMOS Configurations[J]. Microelectronics Journal, 2024, 149: 106257.
[34] Wu J, Guo B, Wang H, Liu H, Li L, Zhou W. A 2.4 GHz 87μW Low-Noise Amplifier in 65 nm CMOS for IoT Applications[J]. Modern Physics Letters B, 2021, 35(32): 2150485.
[35] Zhang H, Sánchez-Sinencio E. Linearization Techniques for CMOS Low Noise Amplifiers: A Tutorial[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2011, 58(1): 22-36.
[36] Liao X, Guo B, Wang H. A 14.5 GHz Dual-Core Noise-Circulating CMOS VCO With Tripler Transformer Coupling, Achieving -123.6 dBc/Hz Phase Noise at 1MHz Offset[C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 377-381.
[37] Guo B, Yang G, Bin X. A differential CMOS common-gate LNA linearized by cross-coupled post distortion technique[J]. Frequenz, 2014, 68(5–6): 235–241.
[38] Guo B, Wang H, Chen J, Deilamsalehi MM. A CMOS low-noise active mixer with enhanced linearity and isolation by exploiting capacitive neutralization technique[J]. Modern Physics Letters B, 2019, 33(18): 1950204.
[39] Guo B, Wang X, Chen H, Chen J. A 0.5–6.5 GHz 3.9-dB NF 7.2-mW active down-conversion mixer in 65 nm CMOS[J]. Modern Physics Letters B, 2018, 32(23): 1850278.
[40] Yang C, Guo B, Wang H, Wang Y, Chen J. A 30-39 GHz 3.1-3.4 NF 6.6 dBm IIP3 CMOS Low-Noise Amplifier With Post-Linearization Technique[C]. 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), 2024: 372-376.
[41] Chen J, Guo B, Zhao F, Wang Y, Wen G. A low-voltage high-swing Colpitts VCO with inherent tapped capacitors based dynamic body bias technique[C]. 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017: 1–4.
[42] Guo B, Chen J, Wang Y, Jin H, Yang G. A Wideband Complementary Noise Cancelling CMOS LNA[C]. 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2016: 142-145.
[43] Guo B, Gong J. A Dual-Band Low-Noise CMOS Switched-Transconductance Mixer With Current-Source Switch Driven by Sinusoidal LO Signals[C]. 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2021: 741-744.
[44] Bhat A N, van der Zee R, Finocchiaro S, Dantoni F, Nauta B. A Baseband-Matching-Resistor Noise-Canceling Receiver Architecture to Increase In-Band Linearity Achieving 175MHz TIA Bandwidth With a 3-Stage Inverter-Only OpAmp[C]. 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019: 155-158.
[45] Guo B, Wang H, Wang H, Li L, Zhou W, Jalali K. A 1–5 GHz 22 mW receiver frontend with active‐feedback baseband and voltage‐commutating mixers in 65 nm CMOS[J]. IET Circuits, Devices & Systems, 2022, 16(7): 543–552.
[46] Guo B, Chen J. A wideband common‐gate CMOS LNA employing complementary MGTR technique[J]. Microwave and Optical Technology Letters, 2017, 59(7): 1668–1671.
[47] Guo B, Fan R, Wang Y, Chen J, Wang H, Wang T. A broadband CMOS LNA with ultra-low balun error and enhanced power efficiency[J]. AEU-International Journal of Electronics and Communications, 2026, 204: 156118.
[48] Chen J, Guo B, Zhang B, Wen G. A Highly Linear Wideband CMOS LNTA Employing Noise/Distortion Cancellation and Gain Compensation[J]. Circuits, Systems, and Signal Processing, 2017, 36(2): 474–494.
[49] Guo B, Chen J. A CMOS Wideband Linear Low-Noise Amplifier Using Dual Capacitor-Cross-Coupled Configurations[C]. 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024: 1-4.
[50] Andrews C, Molnar A C. A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface[J]. IEEE Journal of Solid-State Circuits, 2010, 45(12): 2696-2708.